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About linux : What-does-^-variable-mean-in-Makefile

Question Detail

Unfortunately I can’t find any reference in google, where some special Makefile variables listed with description.

What $^ variable definitely means?

Sorry if obvious.

Question Answer

Each rule of a Makefile has a target and some prerequisites, the variable $^ lists all the prerequisites with a space between the names.
You can see more details here https://www.gnu.org/software/make/manual/html_node/Automatic-Variables.html#Automatic-Variables

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